PXD10RM Datasheet, PDF (474/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

The basic operation of a channel is defined as:
1. The channel is initialized by software loading the transfer control descriptor into the DMA’s
programming model, memory-mapped through the IPS space, and implemented as local memory.
2. The channel requests service; either explicitly by software, a peripheral request or a linkage from
another channel.
NOTE
The major loop executes one iteration per service request.
3. The contents of the transfer control descriptor for the activated channel is read from the local memory
and loaded into the DMA engine’s internal register file.
4. The DMA engine executes the data transfer defined by the transfer control descriptor, reading from the
source and writing to the destination. The number of iterations in the minor loop is automatically
calculated by the DMA engine. The number of iterations within the minor loop is a function of the number
of bytes to transfer (nbytes), the source size (ssize) and the destination size (dsize). The completion of the
minor loop is equal to one iteration of the major loop.
5. At the conclusion of the minor loop’s execution, certain fields of the transfer control descriptor are
written back to the local TCD memory.
The process (steps 2-5) is repeated until the outer major loop’s iteration count is exhausted. At that time,
additional processing steps are completed, e.g., the optional assertion of an interrupt request signaling the
transfer’s completion, final adjustments to the source and destination addresses, etc. A more detailed
description of the channel processing is listed in the pseudo-code below. This simplified example is
intended to represent basic data transfers. Detailed processing associated with the error handling is
omitted.
/* the given DMAchannel is requesting service by the software assertion of the
tcd[channel].start bit, the assertion of an enabled ipd_req from a device, or
the implicit assertion of a channel-to-channel link */
/* begin by reading the transfer control descriptor from the local RAM
into the local dma_engine registers */
dma_engine
= read_from_local_memory [channel];
dma_engine.active = 1;
/* set active flag */
dma_engine.done = 0;
/* clear done flag */
/* check the transfer control descriptor for consistency */
if (dma_engine.config_error == 0) {
/ * begin execution of the inner “minor” loop transfers */
{
/* convert the source transfer size into a byte count */
switch (dma_engine.ssize) {
case 0:
/* 8-bit transfer */
src_xfr_size = 1;
break;
case 1:
/* 16-bit transfer */
src_xfr_size = 2;
break;
15-4
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor