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PXD10RM Datasheet, PDF (610/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller
Table 17-44. NVLML field descriptions
Field
Description
0 LME: Low/Mid address space block Enable (Read Only)
This bit is used to enable the Lock registers (TSLK, MLK1-0 and LLK15-0) to be set or cleared by registers
writes.
This bit is a status bit only. The method to set this bit is to write a password, and if the password matches,
the LME bit will be set to reflect the status of enabled, and is enabled until a reset operation occurs. For
LME the password 0xA1A11111 must be written to the LML register.
0: Low Address Locks are disabled: TSLK, MLK1-0 and LLK15-0 cannot be written.
1: Low Address Locks are enabled: TSLK, MLK1-0 and LLK15-0 can be written.
1:10 Reserved (Read Only).
Write these bits has no effect and read these bits always outputs 0.
11 TSLK: Test/Shadow address space block LocK (Read/Write)
This bit is used to lock the block of Test and Shadow Address Space from Program and Erase (Erase is
any case forbidden for Test block).
A value of 1 in the TSLK register signifies that the Test/Shadow block is locked for Program and Erase.
A value of 0 in the TSLK register signifies that the Test/Shadow block is available to receive Program and
Erase pulses.
The TSLK register is not writable once an interlock write is completed until MCR.DONE is set at the
completion of the requested operation. Likewise, the TSLK register is not writable if a high voltage
operation is suspended.
Upon reset, information from the Test Flash block is loaded into the TSLK register. The TSLK bit may be
written as a register. Reset will cause the bit to go back to its Test Flash block value. The default value of
the TSLK bit (assuming erased fuses) would be locked.
TSLK is not writable unless LME is high.
0: Test/Shadow Address Space Block is unlocked and can be modified (if also SLL.STSLK=0).
1: Test/Shadow Address Space Block is locked and cannot be modified.
12:13 Reserved (Read Only).
Write these bits has no effect and read these bits always outputs 0.
14:15
MLK1-0: Mid address space block LocK 1-0 (Read/Write)
These bits are used to lock the blocks of Mid Address Space from Program and Erase.
All the MLK1-0 are not used for this memory cut that is all mapped in low address space.
A value of 1 in a bit of the MLK register signifies that the corresponding block is locked for Program and
Erase.
A value of 0 in a bit of the MLK register signifies that the corresponding block is available to receive
Program and Erase pulses.
The MLK register is not writable once an interlock write is completed until MCR.DONE is set at the
completion of the requested operation. Likewise, the MLK register is not writable if a high voltage operation
is suspended.
Upon reset, information from the Test Flash block is loaded into the MLK registers. The MLK bits may be
written as a register. Reset will cause the bits to go back to their Test Flash block value. The default value
of the MLK bits (assuming erased fuses) would be locked.
In the event that blocks are not present (due to configuration or total memory size), the MLK bits will default
to locked, and will not be writable. The reset value will always be 1 (independent of the Test Flash block),
and register writes will have no effect.
In the 80 KB Flash Macrocell bits MLK1-0 are read-only and locked at 1.
MLK is not writable unless LME is high.
0: Mid Address Space Block is unlocked and can be modified (if also SLL.SMLK=0).
1: Mid Address Space Block is locked and cannot be modified.
17-60
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor