PXD10RM Datasheet, PDF (778/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Clock
Interrupt request to processor
Hardware vector enable
Interrupt vector
0
Interrupt acknowledge
Read INTC_IACKR
Write INTC_EOIR
INTVEC in INTC_IACKR
0
108
PRI in INTC_CPR
0
Peripheral interrupt request 100
1
0
Figure 21-10. Software Vector Mode Handshaking Timing Diagram
21.6.3.2 Hardware Vector Mode Handshaking
A timing diagram of the interrupt request and acknowledge handshaking in hardware vector mode, along
with the handshaking near the end of the interrupt exception handler, is shown in Figure 21-11. As in
software vector mode, the INTC examines the peripheral and software settable interrupt requests, and
when it finds an asserted one with a higher priority than PRI in INTC_CPR, it asserts the interrupt request
to the processor. The INTVEC field in the INTC_IACKR is updated with the preempting peripheral or
software settable interrupt request’s vector when the interrupt request to the processor is asserted. The
INTVEC field retains that value until the next time the interrupt request to the processor is asserted. In
addition, the value of the interrupt vector to the processor matches the value of the INTVEC field in the
INTC_IACKR. The rest of the handshaking is described in Section 21.4.1.2, Hardware Vector Mode.”
The handshaking near the end of the interrupt exception handler, that is the writing to the INTC_EOIR, is
the same as in software vector mode. Refer to Section 21.6.3.1.2, End of Interrupt Exception Handler.”
21-26
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor