PXD10RM Datasheet, PDF (196/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

8.4.4 Functional Description
8.4.4.1 System Clock Generation
Figure 8-13 shows the block diagram of the system clock generation logic. The MC_ME provides the
system clock select and switch mask (see MC_ME chapter for more details), and the MC_RGM provides
the safe clock request (see MC_RGM chapter for more details). The safe clock request forces the selector
to select the 16 MHz internal RC oscillator as the system clock and to ignore the system clock select.
8.4.4.1.1 System Clock Source Selection
During normal operation, the system clock selection is controlled
• On a SAFE mode event, by MC_RGM
• Otherwise, by the MC_ME
8.4.4.1.2 System Clock Disable
During normal operation, the system clock can be disabled by the MC_ME.
8.4.4.1.3 System clock dividers
The MC_CGM generates three derived clocks from the system clock that are used as the reference clocks
for their associated peripherals.
8.4.4.2 Auxiliary Clock Generation
Figure 8-14 (and those following) shows the block diagram of the auxiliary clock generation logic. See
Section 8.4.3.1.5, Auxiliary Clock 0 Select Control Register (CGM_AC0_SC), Section 8.4.3.1.6,
Auxiliary Clock 1 Select Control Register (CGM_AC1_SC), Section 8.4.3.1.8, Auxiliary Clock 2 Select
Control Register (CGM_AC2_SC), and Section 8.4.3.1.10, Auxiliary Clock 3 Select Control Register
(CGM_AC3_SC) for auxiliary clock selection control.
8-18
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor