PXD10RM Datasheet, PDF (206/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

The crystal oscillator clock can be further divided by a configurable factor in the range 1 to 32 to generate
the divided clock to match system requirements. This division factor is specified by the OSCDIV[4:0] bits
of OSC_CTL register.
8.6.4 Register description
Address offset: 0x0000
Reset value: 0b00000000_10000000_00000000_00000000
0
OSCB
YP
rs
16
M_OS
C
1
2
17
18
reserved
3
4
5
6
reserved
r
19
20
21
22
OSCDIV
7
8
9
23
24
25
I_OSC
Base Address: 0xC3FE0040
10
11
12
13
14
15
EOCV
rw
26
27
28
reserved
29
30
31
S_OSC
OSCO
N
rw
r
rw
rc
r
Table 8-17. Crystal Oscillator Control Register (OSC_CTL)
r
rw
Note: OSC32, after it is enabled, is always ON, but can be configured OFF in standby by writing OSCON bit.
Table 8-18. Crystal Oscillator Control Register (OSC_CTL) field descriptions
Field
Bit 0
Bits 1-7
Bits 8-15
Bit 16
Bits 17-18
Bits 19-23
Description
OSCBYP: Crystal Oscillator bypass
This bit specifies whether the oscillator should be bypassed or not. Software can only set this bit.
System reset is needed to reset this bit.
0: Oscillator output is used as root clock.
1: EXTAL32 is used as root clock.
Reserved
EOCV[7:0]: End of Count Value
These bits specify the end of count value to be used for comparison by the oscillator stabilization
counter OSCCNT after reset or whenever it is switched on from the off state. This counting period
ensures that external oscillator clock signal is stable before it can be selected by the system. When
oscillator counter reaches the value EOCV[7:0]*512, oscillator available interrupt request is
generated. The reset value of this field depends on the device specification. The OSCCNT counter
will be kept under reset if oscillator bypass mode is selected.
M_OSC: Crystal oscillator clock interrupt mask
0: Crystal oscillator clock interrupt is masked.
1: Crystal oscillator clock interrupt is enabled.
Reserved
OSCDIV[4:0]: Crystal oscillator clock division factor
These bits specify the crystal oscillator output clock division factor. The output clock is divided by the
factor OSCDIV+1.
8-28
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor