PXD10RM Datasheet, PDF (80/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

2. VREG HV supply (V_DDR - Should be the last HV supply to ramp up. It is also OK if all HV
supplies including V_DDR ramp up together)
3. LV supply
The reason for following this sequence is to ensure that when VREG releases its LVDs, the I/O and other
HV segments are powered properly. This is important because the PXD10 does not monitor LVDs on I/O
HV supplies.
Table 3-1. Voltage supply pin descriptions
Supply Pin
Function
Pin number
144 LQFP
176 LQFP
VDD12¹ 1.2 V core supply
42, 51, 103, 118, 133
50, 67, 123, 148, 163
VDDA
3.3 V/5 V ADC supply source
53
69
VDDE_A 3.3 V/5 V I/O supply
7, 124
7, 154, 170
VDDE_B 3.3 V/5 V I/O supply
38
46, 64
VDDE_C 3.3 V/5 V I/O supply
63
79
VDDE_E
VDDMA²
VDDMB²
VDDMC²
3.3 V/5 V I/O supply
Motor pads 5 V supply
Motor pads 5 V supply
Motor pads 5 V supply
109
133
77
93
87
103
97
113
VDDPLL 1.2 V PLL supply
31
31
VDDR
VREG reg supply
22
22
VPP³
9 V - 12 V flash test analog write
26
26
signal
VSS
Digital ground
8, 23, 39, 43, 52, 64, 104, 8, 23, 47, 51, 68, 80, 124,
110, 119, 125, 134
134, 149, 155, 164, 65, 171
VSSA
ADC ground
54
70
VSSMA Stepper motor ground
78
94
VSSMB Stepper motor ground
88
104
VSSMC Stepper motor ground
98
114
VSSOSC MHz oscillator ground
28
28
VSSPLL PLL ground
30
30
1 _{Decoupling capacitors must be connected between these pins and the nearest VSS12 pin.}
2 _{All stepper motor supplies need to be at same level (3.3 V or 5 V).}
3 _{This signal needs to be connected to ground during normal operation.}
3.5 Pad types
The pads available for system pins and functional port pins are described in:
PXD10 Microcontroller Reference Manual, Rev. 1
3-6
Freescale Semiconductor
Preliminary—Subject to Change Without Notice