PXD10RM Datasheet, PDF (595/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

8. Compare UMISR0-4 content with the expected result.
9. Write a logic 0 to the UT0.AIE, UT0.MRE and UT0.MRV bits.
10. If more blocks are to be checked, return to step 2.
It is recommended to leave UT0.AIS at 1 and use the linear address sequence that takes less
time.
During the execution of the Margin Mode operation it is forbidden to modify the content of Block Select
(LMS, HBS) and Lock (LML, SLL, HBL) registers, otherwise the MISR value can vary in an
unpredictable way.
The read accesses will be done with the addition of a proper number of Wait States to guarantee the
correctness of the result.
While UT0.AID is low and UT0.AIE is high, the User may clear AIE, resulting in a Array Integrity Check
abort.
UT0.AID must be checked to know when the aborting command has completed.
Example 17-6. Margin Read Check versus ‘1’s
UT0 = 0xF9F99999;
LMS = 0x00000006;
UT0 = 0x80000004;
UT0 = 0x80000024;
UT0 = 0x80000034;
UT0 = 0x80000036;
do
{ tmp = UT0;
} while ( !(tmp & 0x00000001) );
data0 = UMISR0;
data1 = UMISR1;
data2 = UMISR2;
data3 = UMISR3;
data4 = UMISR4;
UT0 = 0x80000034;
UT0 = 0x00000000;
/* Set UTE in UT0: Enable User Test */
/* Set LSL2-1 in LMS: Select Sectors */
/* Set AIS in UT0: Select Operation */
/* Set MRE in UT0: Select Operation */
/* Set MRV in UT0: Select Margin versus 1’s */
/* Set AIE in UT0: Operation Start */
/* Loop to wait for AID=1 */
/* Read UT0 */
/* Read UMISR0 content*/
/* Read UMISR1 content*/
/* Read UMISR2 content*/
/* Read UMISR3 content*/
/* Read UMISR4 content*/
/* Reset AIE in UT0: Operation End */
/* Reset UTE, MRE, MRV, AIS in UT0: Deselect Op. */
ECC logic check
ECC logic can be checked by forcing the input of ECC logic: The 64 bits of data and the 8 bits of ECC
syndrome can be individually forced and they will drive simultaneously at the same value the ECC logic
of the whole page (2 Double Words).
The results of the ECC Logic Check can be verified by reading the MISR value.
The ECC Logic Check operation consists of the following sequence of events:
1. Set UTE in UT0 by writing the related password in UT0.
2. Write in UT1.DAI31-0 and UT2.DAI63-32 the Double Word Input value.
3. Write in UT0.DSI7-0 the Syndrome Input value.
4. Select the ECC Logic Check: write a logic 1 to the UT0.EIE bit.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
17-45