PXD10RM Datasheet, PDF (176/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Address Offset: 0x30
Reset value: xxxx xxxxh
0
1
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11
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R
SR[0:15]
W
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SR[16:31]
W
Figure 7-4. Sample Register 11
7.4 Functional description
As the CAN Sampler is driven by the 16 MHz IRC to sample properly the CAN identifier, two modes are
possible depending on both CAN baudrate and Low Power mode used:
• Immediate sampling on falling edge detection (first CAN frame): this mode is used when the IRC
16 MHz is available in LP mode, e.g. STOP or HALT.
• Sampling on next frame (second CAN frame): this mode is used when the IRC 16 MHz is switched
off in LP mode, e.g. STANDBY. Due to the start-up times of both the Voltage regulator and the IRC
16 MHz (~10 s), the CAN sampler would miss the first bits of a CAN identifier sent at 500kbps.
Therefore the first identifier is ignored and the sampling is performed on the first falling edge of
after interframe space.
The CAN sampler performs sampling on a user selected CAN Rx port, normally when the device is in
standby or stop mode storing the samples in internal registers. The user is required to configure the baud
rate to achieve 8 samples per CAN nominal bit.It does not perform any sort of filtering on input samples.
Thereafter the software must enable the sampler by setting CAN_SMPLR_EN bit in CR register.It then
becomes the master controller for accessing the internal registers implemented for storing samples.
The CAN sampler, when enabled, waits for a low pulse on the selected Rx line, taking it as a valid bit of
the first CAN frame and generates the RC wakeup request which can be used to start the RC oscillator.
Depending upon the mode, it stores the first 8 samples of the 48 bits on selected Rx line or skips the first
frame and stores 8 bits for first 48 bits of second frame. In FF_MODE, it samples the CAN Rx line on RC
clock and stores the 8 samples of first 48 bits (384 samples). In SF_MODE, it samples the Rx and waits
for 11 consecutive dominant bits ( 11 * 8 samples), taking it as the end of first frame. It then waits for first
low pulse on the Rx, taking it as a valid Start of Frame (SOF) of the second frame. The sampler takes 384
samples (48 bytes * 8) using the RC clock (configuring 8 samples per nominal bit) of the second frame,
including the SOF bit. These samples are stored in consecutive addresses of the (12 x 32) internal registers.
RX_COMPLETE bit is set to ‘1’, indicating that sampling is complete.
Software should now process the sampled data by first becoming master for accessing samples internal
registers by resetting CAN_SMPLR_EN bit.The sampler will need to be enabled again to start waiting for
a new sampling routine.
PXD10 Microcontroller Reference Manual, Rev. 1
7-4
Freescale Semiconductor
Preliminary—Subject to Change Without Notice