PXD10RM Datasheet, PDF (621/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 17-52. UT1 field descriptions
Field
Description
0:31 DAI31-00: Data Array Input 31-0 (Read/Write)
These bits represent the input of even word of ECC logic used in the ECC Logic Check. The DAI31-00
correspond to the 32 array bits representing Word 0 within the double word.
0: The array bit is forced at 0.
1: The array bit is forced at 1.
17.3.6.13 User Test 2 register (UT2)
Address Offset: 0x00044
Reset value: 0x00000000
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DAI63 DAI62 DAI61 DAI60 DAI59 DAI58 DAI57 DAI56 DAI55 DAI54 DAI53 DAI52 DAI51 DAI50 DAI49 DAI48
rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
DAI47 DAI46 DAI45 DAI44 DAI43 DAI42 DAI41 DAI40 DAI39 DAI38 DAI37 DAI36 DAI35 DAI34 DAI33 DAI32
rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0
Figure 17-36. User Test 2 register (UT2)
The User Test 2 Register allows to enable the checks on the ECC logic related to the 32 MSB of the Double
Word.
The User Test 2 Register is not accessible whenever MCR.DONE or UT0.AID are low: reading returns
indeterminate data while writing has no effect.
Table 17-53. UT2 field descriptions
Field
Description
0:31 DAI63-32: Data Array Input 63-32 (Read/Write)
These bits represent the input of odd word of ECC logic used in the ECC Logic Check. The DAI63-32
correspond to the 32 array bits representing Word 1 within the double word.
0: The array bit is forced at 0.
1: The array bit is forced at 1.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
17-71