PXD10RM Datasheet, PDF (672/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

frames. A flexible number of Message Buffers (16, 32 or 64) is also supported. The Message Buffers are
stored in an embedded RAM dedicated to the FlexCAN module. Please refer to the Device User Guide for
the actual number of Message Buffers configured in the MCU.
The CAN Protocol Interface (CPI) sub-module manages the serial communication on the CAN bus,
requesting RAM access for receiving and transmitting message frames, validating received messages and
performing error handling. The Message Buffer Management (MBM) sub-module handles Message
Buffer selection for reception and transmission, taking care of arbitration and ID matching algorithms. The
Bus Interface Unit (BIU) sub-module controls the access to and from the internal interface bus, in order to
establish connection to the CPU and to other blocks. Clocks, address and data buses, interrupt outputs and
test signals are accessed through the Bus Interface Unit.
18.1.2 FlexCAN module features
The FlexCAN module includes these distinctive features:
• Full Implementation of the CAN protocol specification, Version 2.0B
— Standard data and remote frames
— Extended data and remote frames
— Zero to eight bytes data length
— Programmable bit rate up to 1 Mb/sec
— Content-related addressing
• Flexible Message Buffers (up to 64) of zero to eight bytes data length
• Each MB configurable as Rx or Tx, all supporting standard and extended messages
• Individual Rx Mask Registers per Message Buffer
• Includes either 1056 bytes (64 MBs) of RAM used for MB storage
• Includes either 256 bytes (64 MBs) of RAM used for individual Rx Mask Registers
• Full featured Rx FIFO with storage capacity for 6 frames and internal pointer handling
• Powerful Rx FIFO ID filtering, capable of matching incoming IDs against either 8 extended, 16
standard or 32 partial (8 bits) IDs, with individual masking capability
• Selectable backwards compatibility with previous FlexCAN version
• Programmable clock source to the CAN Protocol Interface, either bus clock or crystal oscillator
• Unused MB and Rx Mask Register space can be used as general purpose RAM space
• Listen only mode capability
• Programmable loop-back mode supporting self-test operation
• Programmable transmission priority scheme: lowest ID, lowest buffer number or highest priority
• Time Stamp based on 16-bit free-running timer
• Global network time, synchronized by a specific message
• Maskable interrupts
• Independent of the transmission medium (an external transceiver is assumed)
• Short latency time due to an arbitration scheme for high-priority messages
18-2
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor