PXD10RM Datasheet, PDF (791/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

22.4 Memory Map and Register Definition
22.4.1 Memory Map
Table 22-5. Block Memory Map
Offset or
Address
Register
Access Reset Value Location
General Registers
0x00
LCD Control Register (LCDCR)
0x04
LCD Prescaler Control Register (LCDPCR)
0x08
LCD Contrast Control Register (LCDCCR)
0x0C
Unimplemented
0x10
LCD Frontplane Enable Register 0 (FPENR0)
0x14
LCD Frontplane Enable Register 1 (FPENR1)
0x18
Unimplemented
0x1C
Unimplemented
0x20
LCDRAM (Location 0)
0x24
LCDRAM (Location 1)
0x28
LCDRAM (Location 2)
0x2C
LCDRAM (Location 3)
0x30
LCDRAM (Location 4)
0x34
LCDRAM (Location 5)
0x38
LCDRAM (Location 6)
0x3C
LCDRAM (Location 7)
0x40
LCDRAM (Location 8)¹
0x44
LCDRAM (Location 9)²
0x48
LCDRAM (Location 10)³
0x4C
LCDRAM (Location 11)⁴
0x50
LCDRAM (Location 12)⁵
0x54
LCDRAM (Location 13)⁶
0x58
LCDRAM (Location 14)⁷
0x5C
LCDRAM (Location 15)⁸
1 _{End of implemented RAM for 36 FPs}
2 _{End of implemented RAM for 40 FPs}
3 _{End of implemented RAM for 44 FPs}
4 _{End of implemented RAM for 48 FPs}
5 _{End of implemented RAM for 52 FPs}
R/W 0x0000_0000 on page 6
R/W 0x0000_0000 on page 9
R/W 0x0000_0000 on page 10
R/W 0x0000_0000 on page 11
R/W 0x0000_0000 on page 12
R/W 0x0000_0000 on page 13
R/W 0x0000_0000 on page 14
R/W 0x0000_0000 on page 15
R/W 0x0000_0000 on page 16
R/W 0x0000_0000 on page 17
R/W 0x0000_0000 on page 18
R/W 0x0000_0000 on page 19
R/W 0x0000_0000 on page 20
R/W 0x0000_0000 on page 21
R/W 0x0000_0000 on page 22
R/W 0x0000_0000 on page 23
R/W 0x0000_0000 on page 24
R/W 0x0000_0000 on page 25
R/W 0x0000_0000 on page 26
R/W 0x0000_0000 on page 27
R/W 0x0000_0000 on page 28
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
22-5