PXD10RM Datasheet, PDF (250/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

OVR — Overrun bit
The OVR bit indicates that FLAG generation occurred when the FLAG bit was already set. This bit
can be cleared by writing a 1 to it or by writing a 1 to the FLAG bit.
1 = Overrun has occurred
0 = Overrun has not occurred
OVFL — Overflow bit
The OVFL bit indicates that an overflow has occurred in the internal counter. OVFL must be cleared
by software writing a 1 to it.
1 = An overflow had occurred
0 = No overflow
UCIN — Unified Channel Input pin bit
The UCIN bit reflects the input pin state after being filtered and synchronized.
UCOUT — Unified Channel Output pin bit
The UCOUT bit reflects the output pin state.
FLAG — FLAG bit
The FLAG bit is set when an input capture or a match event in the comparators occurred. To clear this
bit, write a 1 to it.
1 = FLAG set event has occurred
0 = FLAG cleared
NOTE
emios_flag_out reflects the FLAG bit value. When DMA bit is set, the
FLAG bit can be cleared by the DMA controller.
9.4.2.10 eMIOS200 UC Alternate A Register (EMIOSALTA[n])
EMIOSALTA[n] address: UC[n] base address + 0x14
9-24
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor