PXD10RM Datasheet, PDF (1109/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

32.4 Functional Description
32.4.1 Reset State Machine
The main role of MC_RGM is the generation of the reset sequence which ensures that the correct parts of
the device are reset based on the reset source event. This is summarized in Table 32-12.
Table 32-12. MC_RGM Reset Implications
Source
What Gets Reset
External Reset Boot Mode
Assertion
Capture
power-on reset
all
yes
yes
‘destructive’ resets
all except some clock/reset management
yes
yes
external reset
all except some clock/reset management and debug
yes
yes
‘functional’ resets
all except some clock/reset management and debug programmable¹ programmable²
shortened ‘functional’ resets³ flip-flops except some clock/reset management
programmable¹ programmable²
1 _{the assertion of the external reset is controlled via the RGM_FBRE register}
2 _{the boot mode is captured if the external reset is asserted}
3 _{the short sequence is enabled via the RGM_FESS register}
NOTE
JTAG logic has its own independent reset control and is not controlled by
the MC_RGM in any way.
The reset sequence is comprised of five phases managed by a state machine, which ensures that all phases
are correctly processed through waiting for a minimum duration and until all processes that need to occur
during that phase have been completed before proceeding to the next phase.
The state machine used to produce the reset sequence is shown in Figure 32-11.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
32-17