PXD10RM Datasheet, PDF (172/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

6.6 Protocol
Table 6-8 summarizes the protocol and BAM action during this boot mode. All data are transmitted byte
wise.
Table 6-8. FlexCAN Boot Mode Download Protocol (Autobaud Disabled)
Protocol
step
Host sent
message
BAM response
message
Action
1
CAN ID 0x011+ CAN ID 0x001+
64-bit password 64-bit password
Password checked for validity and compared against stored
password.
2
CAN ID 0x012+ CAN ID 0x002+
32-bit store
32-bit store
address+
address+
VLE bit+
VLE bit+
31-bit number of 31-bit number of
bytes
bytes
Load address is stored for future use.
Size of download is stored for future use.
Verify if VLE bit is set to 1
3
CAN ID 0x013+ CAN ID 0x003+
8-bit data are packed into 32-bit words. These words are saved
8 to 64 bits of raw 8 to 64 bits of raw
in SRAM starting from the “Load address”.
binary data
binary data
“Load address” increments until the number of data received
and stored matches the size as specified in the previous step.
5
none
none
Branch to dowloaded code
Table 6-9. System clock frequency related to external clock frequency
f_osc [MHz]
f_rc/f_osc1
f_sys [MHz]
4-8
4-2
16 - 32
8 - 12
2 - 4/3
32 - 48
12 - 16
4/3 - 1
36 - 48
16 - 24
1 - 2/3
32 - 48
> 24
< 2/3
> 24
1 _{These values and consequently the fsys suffer from the precision of the RC internal oscillator used to}
measure f_osc through the CMU module.
6.6.1 Interrupts
No interrupts are generated by or are enabled by the BAM.
6-14
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor