PXD10RM Datasheet, PDF (494/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

affected by writes to this register; it is also affected by writes to the DMACERR register. On writes to the
DMAERR, a one in any bit position clears the corresponding channel’s error status. A zero in any bit
position has no affect on the corresponding channel’s current error status. The DMACERR register is
provided so the error indicator for a single channel can easily be cleared. See Figure 15-15 and Table 15-15
for the DMAERR definition.
Register address: DMA_Offset + 0x0028 (DMAERRH), +0x002c (DMAERRL)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR
W
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR
W
47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR
W
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR ERR
W
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name
ERRn,
n = 0,... 15
n = 0,... 31
n = 0,... 63
= Unimplemented
Figure 15-15. DMA Error (DMAERRH, DMAERRL) Registers
Table 15-15. DMA Error (DMAERRH, DMAERRL) field descriptions
Description
DMA Error n
Value
0 An error in channel n has not occurred.
1 An error in channel n has occurred.
15.2.1.15 DMA Hardware Request Status (DMAHRSH, DMAHRSL)
The DMAHRS{H,L} registers provide a bit map for the implemented channels {16,32,64} to show the
current hardware request status for each channel. DMAHRSH supports channels 63-32, while DMAHRSL
covers channels 31-00. Hardware request status reflects the current state of the registered and qualified (via
the DMAERQ field) ipd_req lines as seen by the DMA2’s arbitration logic. This view into the hardware
request signals may be used for debug purposes.
See Figure 15-16 and Figure 15-16 for the DMAHRS definition.
15-24
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
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