PXD10RM Datasheet, PDF (700/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

programmed on its ID field. A masking scheme makes it possible to match the ID programmed on the MB
with a range of IDs on received CAN frames. For transmission, an arbitration algorithm decides the
prioritization of MBs to be transmitted based on the message ID (optionally augmented by 3 local priority
bits) or the MB ordering.
Before proceeding with the functional description, an important concept must be explained. A Message
Buffer is said to be “active” at a given time if it can participate in the matching and arbitration algorithms
that are happening at that time. An Rx MB with a ‘0000’ code is inactive (refer to Table 18-5). Similarly,
a Tx MB with a ‘1000’ or ‘1001’ code is also inactive (refer to Table 18-6). An MB not programmed with
‘0000’, ‘1000’ or ‘1001’ will be temporarily deactivated (will not participate in the current arbitration or
matching run) when the CPU writes to the C/S field of that MB (see Section 18.4.6.2, Message Buffer
Deactivation).
18.4.2 Transmit process
In order to transmit a CAN frame, the CPU must prepare a Message Buffer for transmission by executing
the following procedure:
• If the MB is active (transmission pending), write an ABORT code (‘1001’) to the Code field of the
Control and Status word to request an abortion of the transmission, then read back the Code field
and the IFRL/IFRH registers to check if the transmission was aborted (see Section 18.4.6.1,
Transmission Abort Mechanism). If backwards compatibility is desired (AEN in MCR negated),
just write ‘1000’ to the Code field to inactivate the MB but then the pending frame may be
transmitted without notification (see Section 18.4.6.2, Message Buffer Deactivation).
• Write the ID word.
• Write the data bytes.
• Write the Length, Control and Code fields of the Control and Status word to activate the MB.
Once the MB is activated in the fourth step, it will participate into the arbitration process and eventually
be transmitted according to its priority. At the end of the successful transmission, the value of the Free
Running Timer is written into the Time Stamp field, the Code field in the Control and Status word is
updated, a status flag is set in the Interrupt Flag Register and an interrupt is generated if allowed by the
corresponding Interrupt Mask Register bit. The new Code field after transmission depends on the code that
was used to activate the MB in step four (see Table 18-5 and Table 18-6 in Section 18.3.2, Message Buffer
Structure). When the Abort feature is enabled (AEN in MCR is asserted), after the Interrupt Flag is asserted
for a MB configured as transmit buffer, the MB is blocked, therefore the CPU is not able to update it until
the Interrupt Flag be negated by CPU. It means that the CPU must clear the corresponding interrupt flag
bit before starting to prepare this MB for a new transmission or reception.
18.4.3 Arbitration process
The arbitration process is an algorithm executed by the MBM that scans the whole MB memory looking
for the highest priority message to be transmitted. All MBs programmed as transmit buffers will be
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PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor