PXD10RM Datasheet, PDF (390/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 12-34. Mask parameter error status register field descriptions (continued)
Field
20
Mask the interrupt
M_L11_parr_err 1’b1: mask the interrupt
1’b0: Do not mask interrupt
21
Mask the interrupt
M_L10_parr_err 1’b1: mask the interrupt
1’b0: Do not mask interrupt
22
M_L9_parr_err
Mask the interrupt
1’b1: mask the interrupt
1’b0: Do not mask interrupt
23
M_L8_parr_err
Mask the interrupt
1’b1: mask the interrupt
1’b0: Do not mask interrupt
24
M_L7_parr_err
Mask the interrupt
1’b1: mask the interrupt
1’b0: Do not mask interrupt
25
M_L6_parr_err
Mask the interrupt
1’b1: mask the interrupt
1’b0: Do not mask interrupt
26
M_L5_parr_err
Mask the interrupt
1’b1: mask the interrupt
1’b0: Do not mask interrupt
27
M_L4_parr_err
Mask the interrupt
1’b1: mask the interrupt
1’b0: Do not mask interrupt
28
M_L3_parr_err
Mask the interrupt
1’b1: mask the interrupt
1’b0: Do not mask interrupt
29
M_L2_parr_err
Mask the interrupt
1’b1: mask the interrupt
1’b0: Do not mask interrupt
30
M_L1_parr_err
Mask the interrupt
1’b1: mask the interrupt
1’b0: Do not mask interrupt
31
M_L0_parr_err
Mask the interrupt
1’b1: mask the interrupt
1’b0: Do not mask interrupt
Description
12.3.4.30 THRESHOLD_INP_BUF_1 Register
Figure 12-40 shows the threshold register for input buffer.
12-58
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor