PXD10RM Datasheet, PDF (923/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

25.3.2.4 Interrupt Status Register (ME_IS)
Address 0xC3FD_C00C
Access: Supervisor read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
0
0
0
0
0
0
0
0
0
0
W
w1c w1c w1c w1c
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 25-5. Interrupt Status Register (ME_IS)
This register provides the current interrupt status.
Table 25-7. Interrupt Status Register (ME_IS) Field Descriptions
Field
I_ICONF
I_IMODE
I_SAFE
I_MTC
Description
Invalid mode configuration interrupt — This bit is set whenever a write operation to ME_<mode>_MC
registers with invalid mode configuration is attempted. It is cleared by writing a ‘1’ to this bit.
0 No invalid mode configuration interrupt occurred
1 Invalid mode configuration interrupt is pending
Invalid mode interrupt — This bit is set whenever an invalid mode transition is requested. It is cleared by writing
a ‘1’ to this bit.
0 No invalid mode interrupt occurred
1 Invalid mode interrupt is pending
SAFE mode interrupt — This bit is set whenever the device enters SAFE mode on hardware requests generated
in the system. It is cleared by writing a ‘1’ to this bit.
0 No SAFE mode interrupt occurred
1 SAFE mode interrupt is pending
Mode transition complete interrupt — This bit is set whenever the mode transition process completes
(S_MTRANS transits from 1 to 0). It is cleared by writing a ‘1’ to this bit. This mode transition interrupt bit will not
be set while entering low-power modes HALT, STOP, or STANDBY.
0 No mode transition complete interrupt occurred
1 Mode transition complete interrupt is pending
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
25-17