PXD10RM Datasheet, PDF (204/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

8.5.3 Register description
Address offset: 0x0000
Reset value: 0b00000000_10000000_00000000_00000000
Base Address: 0xC3FE0000
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
OSCB
YP
reserved
EOCV
rs
r
rw
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
M_OS
C
reserved
OSCDIV
I_OSC
reserved
rw
r
rw
rc
r
Figure 8-19. Crystal Oscillator Control Register (OSC_CTL)
Table 8-15. Crystal Oscillator Control Register (OSC_CTL) field descriptions
Field
Bit 0
Bits 1-7
Bits 8-15
Bit 16
Bits 17-18
Bits 19-23
Bit 24
Bits 25-31
Description
OSCBYP: Crystal Oscillator bypass
This bit specifies whether the oscillator should be bypassed or not. Software can only set this bit.
System reset is needed to reset this bit.
0: Oscillator output is used as root clock.
1: EXTAL is used as root clock.
Reserved
EOCV[7:0]: End of Count Value
These bits specify the end of count value to be used for comparison by the oscillator stabilization
counter OSCCNT after reset or whenever it is switched on from the off state. This counting period
ensures that external oscillator clock signal is stable before it can be selected by the system. When
oscillator counter reaches the value EOCV[7:0]*512, oscillator available interrupt request is
generated. The reset value of this field depends on the device specification. The OSCCNT counter
will be kept under reset if oscillator bypass mode is selected.
M_OSC: Crystal oscillator clock interrupt mask
0: Crystal oscillator clock interrupt is masked.
1: Crystal oscillator clock interrupt is enabled.
Reserved
OSCDIV[4:0]: Crystal oscillator clock division factor
These bits specify the crystal oscillator output clock division factor. The output clock is divided by the
factor OSCDIV+1.
I_OSC: Crystal oscillator clock interrupt
This bit is set by hardware when OSCCNT counter reaches the count value EOCV[7:0]*512. It is
cleared by software by writing ‘1’.
0: No oscillator clock interrupt occurred.
1: Oscillator clock interrupt pending.
Reserved
Note: OSC_CTL register is writable only in supervisor mode.
8-26
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor