PXD10RM Datasheet, PDF (207/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 8-18. Crystal Oscillator Control Register (OSC_CTL) field descriptions
Bit 24
Bits 25-29
Bit 30
Bit 31
I_OSC: Crystal oscillator clock interrupt
This bit is set by hardware when OSCCNT counter reaches the count value EOCV[7:0]*512. It is
cleared by software by writing ‘1’.
0: No oscillator clock interrupt occurred.
1: Oscillator clock interrupt pending.
Reserved
S_OSC: Crystal oscillator statusl
0: Crystal oscillator output clock is not stable.
1: Crystal oscillator is providing a stable clock.
OSCON: Crystal oscillator powerdown control
0: Crystal oscillator is switched off.
1: Crystal oscillator is switched on.
Note: OSC_CTL register is writable only in supervisor mode.
8.7 SIRC digital interface
8.7.1 Introduction
The SIRC digital interface controls the internal low power 128 kHz RC oscillator (SIRC). It holds control
and status registers accessible for application.
8.7.2 Low Power RC Oscillator (128 kHz)
The low power RC oscillator provides a low frequency (f_LPRC ) clock in the range of tens of kHz requiring
less current consumption. This clock can be used as reference clock when a fixed base time is required for
specific modules.
The low power RC oscillator is always on in all device modes.
The SIRC clock can be further divided by a configurable division factor in the range 1 to 32 to generate
the divided clock to match system requirements. This division factor is specified by the LPRCDIV[4:0]
bits of LPRC_CTL register.
The SIRC oscillator output frequency can be trimmed by LPRCTRIM[4:0] bits of LPRC_CTL register.
These bits can be programmed to modify internal capacitor/resistor. After power on reset, the trimming
bits are provided by the flash options. Only after first write access, the value specified by LPRCTRIM[4:0]
bits will contol the trimming.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
8-29