PXD10RM Datasheet, PDF (356/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Offset:
0x004 (CtrlDescL0_2)
0x020 (CtrlDescL1_2)
0x03C (CtrlDescL2_2)
0x058 (CtrlDescL3_2)
0x074 (CtrlDescL4_2)
0x090 (CtrlDescL5_2)
0x0AC (CtrlDescL6_2)
0x0C8 (CtrlDescL7_2)
0x0E4 (CtrlDescL8_2)
0x100 (CtrlDescL9_2)
0x11C (CtrlDescL10_2)
0x138 (CtrlDescL11_2)
0x154 (CtrlDescL12_2)
0x170 (CtrlDescL13_2)
0x18C (CtrlDescL14_2)
0x198 (CtrlDescL15_2)
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R0 0 0 0 0 0
W
POSY
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0 0 0 0
W
POSX
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 2.
Figure 12-5. CtrlDescL0_2 Register
Table 12-7. CtrlDescL0_2 Field Descriptions
Field
6–15
POSY
20–31
POSX
Description
Amount of pixels from the top of display frame
Amount of pixels from the left of display frame
12.3.4.3 Control Descriptor L0_3 Register
Figure 12-6 represents the control descriptor L0_3 register. This register sets the beginning address of
layer data.
12-24
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor