PXD10RM Datasheet, PDF (236/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 9-8. Unified Channel Memory Map
0x0C
Control register (EMIOSC[n])
0x10
Status register (EMIOSS[n])
0x14
Alternate A register (EMIOSALTA[n])
0x18 - 0x1F
reserved
9.4.2 Register description
All control registers are 32 bits wide. This document illustrates the eMIOS200 with 24 Unified Channels
and 16-bit wide data registers.
9.4.2.1 eMIOS200 Module Configuration Register (EMIOSMCR)
The EMIOSMCR contains global control bits for the eMIOS200 block.
address: eMIOS200 base address +0x00
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R₀
GPRE ⁰
0
0
0
0
0
MDIS FRZ GTBE ETB
W
N
SRV
RESET: ₀
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
GPRE
W
0
0
0
0
0
0
0
0
RESET: ₀
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 9-5. eMIOS200 Module Configuration Register (EMIOSMCR)
9-10
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor