PXD10RM Datasheet, PDF (1027/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 30-19. QSPI_SPIRSER Field Descriptions (continued)
Field
Description
RFDF_RE
RX FIFO Drain Request Enable. The RFDF_RE bit enables the RFDF flag in the QSPI_SPISR to
generate a request. The RFDF_DIRS bit selects between generating an interrupt request or a DMA
request.
0 RFDF interrupt requests or DMA requests are disabled
1 RFDF interrupt requests or DMA requests are enabled
RFDF_DIRS
RX FIFO Drain DMA or Interrupt Request Select. The RFDF_DIRS bit selects between generating
a DMA request or an interrupt request. When the RFDF flag bit in the QSPI_SPISR is set, and the
RFDF_RE bit in the QSPI_SPIRSER register is set, the RFDF_DIRS bit selects between generating
an interrupt request or a DMA request.
0 Interrupt request will be generated
1 DMA request will be generated
30.4.3.7 PUSH TX FIFO Register (QSPI_PUSHR)
The QSPI_PUSHR provides a means to write to the TX FIFO and to configure the parameters for the SPI
transmission. Data written to the TXDATA field is transferred to the TX FIFO. See Section 30.5.2.5,
Transmit First In First Out (TX FIFO) Buffering Mechanism,” for more information and Table 30-45 for
the byte ordering.
Address: QSPI_BASE +
0x034
32-bit write access required
Write: SPI Mode
0
1
2
3
4
5
6
R _CON
WT
CTAS
EOQ
CTC
NT
0
Reset 0 0 0 0 0 0 0
7
8
9
10 11 12 13 14 15
0 _{PCS PCS PCS PCS PCS PCS PCS PCS}
76543210
000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
TXDATA
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 30-7. PUSH TX FIFO Register (QSPI_PUSHR)
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
30-23