PXD10RM Datasheet, PDF (108/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

4.1.3.2 Register Description
This section describes in address order all the Register Protection registers. Each description includes a
standard register diagram with an associated figure number. Details of register bit and field function follow
the register diagrams, in bit order.
Figure 4-3. Key to Register Fields
Always 1 Always 0 R/W BIT Read- BIT Write-
Write 1 BIT Self-clear 0 N/A
reads 1
reads 0
bit
only bit
only bit _BIT to clear _w1c
bit _BIT
4.1.3.2.1 Module Registers (MR0-6143)
This is the lower 6K module memory space which holds all the functional registers of the module that is
protected by the Register Protection module.
4.1.3.2.2 Module Register and Set Soft Lock Bit (LMR0-6143)
This is memory area #3 that provides mirrored access to the MR0-6143 registers with the side effect of
setting Soft Lock Bits in case of a write access to a MR that is defined as protectable by the locking
mechanism. Each MR is protectable by one associated bit in a SLBRn.SLBm, according to the mapping
described in Table 4-2.
4.1.3.2.3 Soft Lock Bit Register (SLBR0-1535)
These registers hold the Soft Lock Bits for the protected registers in memory area #1.
0x3800-0x3DFF
Address
R
W
Reset
0
0
WE0
0
1
0
WE1
2
0
WE2
3
0
WE3
4
SLB0
5
SLB1
0
0
0
0
0
Figure 4-4. Soft Lock Bit Register (SLBRn)
Access: Read always
Supervisor write
6
7
SLB2
SLB3
0
0
PXD10 Microcontroller Reference Manual, Rev. 1
4-4
Freescale Semiconductor
Preliminary—Subject to Change Without Notice