PXD10RM Datasheet, PDF (879/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 23-32. Filter to interrupt vector correlation
Number of Number of active filters Number of active filters
active filters configured as TX
configured as RX
Interrupt vector
a
(a > 0)
n
(n = a + b)
a
a
(a > 0)
b
0
(b > 0)
0
b
(b > 0)
b
— TX interrupt on identifiers
matching the filters,
— RX interrupt on all other
identifiers if BF bit is set, no RX
interrupt if BF bit is reset
— TX interrupt on identifiers
matching the TX filters,
— RX interrupt on identifiers
matching the RX filters,
— all other identifiers discarded
(no interrupt)
— RX interrupt on identifiers
matching the filters,
— TX interrupt on all other
identifiers if BF bit is set, no TX
interrupt if BF bit is reset
@
MESSAGE0
+
IFMI
MESSAGE1
DATA
pointers
table
MESSAGE2
SRAM
Figure 23-31. Identifier match index
23.8.2.4 Slave mode with automatic resynchronization
Automatic resynchronization must be enabled in Slave mode if f_{periph_set_1_clk} tolerance is greater than
1.5%. This feature compensates a f_{periph_set_1_clk} deviation up to 14%, as specified in LIN standard.
This mode is similar to Slave mode as described in Section 23.8.2.2, Slave mode with the addition of
automatic resynchronization enabled by the LASE bit. In this mode LINFlex adjusts the fractional baud
rate generator after each Synch Field reception.
Automatic resynchronization method
When automatic resynchronization is enabled, after each LIN Break, the time duration between five falling
edges on RDI is sampled on f_{periph_set_1_clk} and the result of this measurement is stored in an internal 19-bit
register called SM (not user accessible) (see Figure 23-32). Then the LFDIV value (and its associated
registers LINIBRR and LINFBRR) are automatically updated at the end of the fifth falling edge. During
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
23-47