PXD10RM Datasheet, PDF (1086/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

31.5 Debug support
To simplify software development it is possible to temporarily suspend the RTC counter while the MCU
is stopped by a debugger. While the MCU is running the RTC counter runs normally. This feature is
enabled by setting the RTCC[FRZ] bit and is only available when the CPU has debug mode active (see the
CPU reference manual for more information on debug mode and support).
31.6 Register descriptions
31.6.1 RTC Supervisor Control Register (RTCSUPV)
The RTCSUPV register contains the SUPV bit which determines whether other registers are accessible in
supervisor mode or user mode.
NOTE
RTCSUPV register is accessible only in supervisor mode.
Figure 31-3. RTC Supervisor Control Register (RTCSUPV)
Offset: RTC_BASE + 0x0000
0 1 2 34567891111111111222222222233
0123456789012345678901
R SUP
WV
POR 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 31-1. RTCSUPV Register Bit/Field Descriptions
Field
0
SUPV
Description
RTC Supervisor Bit
0 All registers are accessible in both user as well as supervisor mode.
1 All other registers are accessible in supervisor mode only.
31-4
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor