PXD10RM Datasheet, PDF (816/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 22-27. Clock Divider (continued)
LCLK
1101
1110
1111
Divider
2¹³ * 480
2¹⁴ * 480
2¹⁵ * 480
The following formula may be used to calculate the LCD frame frequency:
LCD Frame Frequency (Hz)=
O_-----S_----C_----C_-----L_----K_----_---H_----z_----
Divider
Eqn. 22-1
Example: Clock = 16 MHz, Prescaler = 1010;
--¹---⁶----^----¹---⁰----⁶--
2¹⁰  480
 33 Hz
NOTE
A “Frame” is the full refresh cycle of the display. See Section 22.6, LCD
Waveform Examples,” for waveform illustrations.
Eqn. 22-2
22.5.3 Contrast Adjustment
The LCD Driver module offers two different ways to adjust contrast:
22.5.3.1 Adjusting the supply voltage (VLCD)
The VLCD voltage can directly be used as reference and source to drive the LCD segments. The contrast
could be easily adjusted by altering the voltage at the VLCD pin.
22.5.3.2 Adding Contrast Adjustment Phases
Another way to adjust the contrast is to add another phase to the refresh cycle which keeps the voltage the
same on all frontplane and backplane electrodes (V_SS in this case). This will contribute towards lowering
the V_ONRMS and V_OFFRMS voltages over the segment. For this reason, the whole frame is divided into
steps. The value from the Contrast Control register (LCC) determines how many of these steps are taken
by the contrast phase. Whenever the length of the contrast adjustment phase is changed, the length of the
other phases is automatically changed to ensure the frame length remains the same.
Example: A value of 256 in the Contrast Control (LCC) register will force the contrast phase to take
approximately a 256/2047 of the length of the whole frame.
22-30
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor