PXD10RM Datasheet, PDF (1171/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 36-2. Block Memory Map (continued)
Offset
Register Name (Long)
Register Name (Short)
0x0C
SSD Prescaler Register
PRESCALE
0x0E
RESERVED²
1 _{Note that R/W registers may contain some read-only or write-only bits.}
2 _{Read access provides 0x0000. No write allowed.}
Access¹ Location
R/W on page 10
n/a
—
36.3.2 _{Register Summary}
Figure 36-2 and Table 36-3 below illustrate the different access modes of some register bits.
Always 1 Always 0 R/W BIT Read- BIT Write-
Write 1 BIT Self-clear 0 N/A
reads 1
reads 0
bit
only bit
only bit _BIT to clear _w1c
bit _BIT
Figure 36-2. Key to Register Fields
Table 36-3 provides a key for register figures and tables.
Table 36-3. Register Conventions
Convention
Description
FIELDNAME
Depending on its placement in the read or write row, indicates that the bit is not readable or not
writeable.
Identifies the field. Its presence in the read or write row indicates that it can be read or written.
Register Field Types
R
Read only. Writing this bit has no effect. Register content is updated in hardware.
W
Write only. If no read value is given any read access will provide undefined results. Refer to
description of individual bits for additional effects of read.
R/W
Standard read/write bit. Only software can change the bit’s value (other than a hardware reset).
w1c
Write one to clear. A status bit that can be read, and is cleared by writing a one.
Reset Values
0
Resets to zero.
1
Resets to one.
—
Undefined at reset.
u
Unaffected by reset.
[signal_name] Reset value is determined by polarity of indicated signal.
36.3.3 Register Descriptions
This section describes the individual bits of all the SSD registers. Note that the details of the functional
description linked to these bits is given in Section 36.4, Functional Description”.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
36-5