PXD10RM Datasheet, PDF (633/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

The results of the ECC Logic Check can be verified by reading the MISR value.
The ECC Logic Check operation consists of the following sequence of events:
1. Set UTE in UT0 by writing the related password in UT0.
2. Write in UT1.DAI31-0 and UT2.DAI63-32 the Double Word Input value.
3. Write in UT0.DSI7-0 the Syndrome Input value.
4. Select the ECC Logic Check: write a logic 1 to the UT0.EIE bit.
5. Write a logic 1 to the UT0.AIE bit to start the ECC Logic Check.
6. Wait until the UT0.AID bit goes high.
7. Compare UMISR0-4 content with the expected result.
8. Write a logic 0 to the UT0.AIE bit.
Notice that when UT0.AID is low UMISR0-4, UT1-2 and bits MRE, MRV, EIE, AIS and DSI7-0 of UT0
are not accessible: reading returns undeterminate data and write has no effect.
Example 17-14. ECC logic check
UT0
= 0xF9F99999;
UT1
= 0x55555555;
UT2
= 0xAAAAAAAA;
UT0
= 0x80FF0000;
UT0
= 0x80FF0008;
UT0
= 0x80FF000A;
do
{ tmp
= UT0;
} while ( !(tmp & 0x00000001) );
data0
= UMISR0;
data1
= UMISR1;
data2
= UMISR2;
data3
= UMISR3;
data4
= UMISR4;
UT0
= 0x00000000;
/* Set UTE in UT0: Enable User Test */
/* Set DAI31-0 in UT1: Even Word Input Data */
/* Set DAI63-32 in UT2: Odd Word Input Data */
/* Set DSI7-0 in UT0: Syndrome Input Data */
/* Set EIE in UT0: Select ECC Logic Check */
/* Set AIE in UT0: Operation Start */
/* Loop to wait for AID=1 */
/* Read UT0 */
/* Read UMISR0 content (expected 0x55555555) */
/* Read UMISR1 content (expected 0xAAAAAAAA) */
/* Read UMISR2 content (expected 0x55555555) */
/* Read UMISR3 content (expected 0xAAAAAAAA) */
/* Read UMISR4 content (expected 0x00FF00FF) */
/* Reset UTE, AIE and EIE in UT0: Operation End */
17.3.8 Error Correction Code
The Flash Macrocell provides a method to improve the reliability of the data stored in Flash: the usage of
an Error Correction Code. The word size is fixed of 64 bits.
At each Double Word of 64 bits there are associated 8 ECC bits that are programmed in such a way to
guarantee a Single Error Correction and a Double Error Detection (SEC-DED).
ECC circuitry provides correction of single bit faults and is used to achieve automotive reliability targets.
Some units will experience single bit corrections throughout the life of the product with no impact to
product reliability.
17.3.8.1 ECC algorithm
The Flash Macrocell supports one ECC algorithm: “All ‘1’s No Error”. This algorithm detects as valid any
Double Word read on a just erased sector (all the 72 bits are ‘1’s).
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
17-83