PXD10RM Datasheet, PDF (334/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

12.1.1 Overview
Registers
Interface
(control
descriptors
for each
layer)
Slave bus I/F
Layer0
Layer1
Layer2
...
Layer14
Layer15
BGCOLOR
CLUT/
Tile
RAM
(6KB)
Cursor
RAM
(1 KB)
Gamma
RAM
(256 x 8 x3)
CH4
AHB
Master
I/F
CH3
CH2
In FIFO
In FIFO
In FIFO
Pixel
Format
Converter
Blending
Gamma
Correction
out
FIFO
TFT
Display _display
Driver
CH1
In FIFO
pdi_clk
pdi_hsync
External
Video ^pdi_vsync
Source ^{pdi_datain[17:0]}
Parallel
data
Interface
CRC_ready interrupt
CRC pos
CRC value
Timing signals to other modules
Signature
Calculator
MUX _{clk,hsync,vsync}
dcu_clk _{Timing and}
pix_clk_in _Control
pdi_clk
Unit
Mode
Figure 12-1. Display Control Unit Block Diagram
Figure 12-1 shows the DCU architecture. This comprises two distinct sections. The lower section shows
the functional blocks of the DCU that fetch the graphic and video content and drive the TFT LCD panel.
The upper section describes the user interface through which the user configures the graphical content of
the TFT LCD panel.
12-2
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor