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PXD10RM Datasheet, PDF (119/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller
4.2.5.4 SWT Time-Out Register (SWT_TO)
The SWT Time-Out (SWT_TO) register contains the 32-bit time-out period. This register is read only if
either the SWT_CR.HLK or SWT_CR.SLK bits are set.
Offset 0x008
Access: Read/Write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1 19 20 21 22 23 24 25 26 27 28 29 30 31
8
R
WTO
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0
Figure 4-15. SWT Time-Out Register (SWT_TO)
The default counter value (SWT_TO_RST) is 1280 (0x500 hexadecimal) which correspond to 10 ms with
a 128 kHz clock.
Table 4-9. SWT_TO Register Field Descriptions
Field
Description
WTO Watchdog time-out period in clock cycles. An internal 32-bit down counter is loaded with this value or
0x100 which ever is greater when the service sequence is written or when the SWT is enabled.
4.2.5.4.1 SWT Window Register (SWT_WN)
The SWT Window (SWT_WN) register contains the 32-bit window start value. This register is cleared on
reset. This register is read only if either the SWT_CR.HLK or SWT_CR.SLK bits are set.
Offset 0x00C
Access: Read/Write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1 19 20 21 22 23 24 25 26 27 28 29 30 31
8
R
WST
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 4-16. SWT Window Register (SWT_WN)
Table 4-10. SWT_WN Register Field Descriptions
Field
Description
WST Window start value. When window mode is enabled, the service sequence can only be written when the
internal down counter is less than this value.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
4-15