PXD10RM Datasheet, PDF (386/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Table 12-32. PDI Status Mask Register Field Descriptions (continued)
Field
30
m_pdi_clk_lost
31
m_pdi_clk_det
Description
Mask the pdi_clk_lost bit
1’b1: mask the pdi_clk_lost interrupt
1’b0: Do not mask he pdi_clk_lost interrupt
Mask the pdi_clk_det bit
1’b1: mask the pdi_clk interrupt
1’b0: Do not mask he pdi_clk interrupt
12.3.4.28 PARR_ERR status Register
Figure 12-38 shows the parameter error status register.
An error in a layer can occur under the following conditions:
a) Number of pixels in a tile > maximum tile memory size in case of Tile bandwidth optimized
mode (when in internal memory mode)
b) There is an automatic error checking mechanism when a layer is enabled that detects a
non-valid horizontal size and color format combination. See Section 12.4.5.3, Layer size and
positioning,” for details.
These errors are grouped into a single bit error for each layer. The parameter error specific to each layer is
signalled only when the layer is enabled.
DISP_ERR occurs when the size of display (height or width) is set to zero or when the pulse width of
hsync/vsync is programmed as zero.
SIG_ERR occurs when the area of interest for calculating CRC value is programmed with values which
are outside the display.
HWC_ERR occurs if size of cursor programmed is greater than memory size(256x32).See Section 12.4.6,
Hardware cursor,” for further details on how cursor can be programmed.
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PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor