PXD10RM Datasheet, PDF (941/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

25.4.2 Modes Details
25.4.2.1 RESET Mode
The device enters this mode whenever the system reset is asserted by the MC_RGM. Transition to this
mode is instantaneous, and the system remains in this mode until the reset sequence is finished. All power
domains are made active during this mode.
25.4.2.2 DRUN Mode
The device enters this mode on the following events.
• automatically from RESET mode after completion of the reset sequence
• from RUN0…3, SAFE, or TEST mode when the TARGET_MODE bit field of the ME_MCTL
register is written with “0011”
• from the STANDBY mode after an external wakeup event or internal wakeup alarm (e.g. )
As soon as any of the above events has occurred, a DRUN mode transition request is generated. The mode
configuration information for this mode is provided by the ME_DRUN_MC register. In this mode, the
flashes, all clock sources, and the system clock configuration can be controlled by software as required.
After system reset, the software execution starts with the default configuration selecting the 16MHz int.
RC osc. as the system clock.
This mode is intended to be used by software
• to initialize all registers as per the system needs
• to execute small routines in a ‘ping-pong’ with the STANDBY mode
When this mode is entered from STANDBY after a wakeup event, the ME_DRUN_MC register content
is restored to its pre-STANDBY values, and the mode starts in that configuration.
All power domains are active when this mode is entered due to a system reset sequence initiated by a
destructive reset event. In other cases of entry, such as the exit from STANDBY after a wakeup event, a
functional reset event like an external reset or a software request from RUN0…3, SAFE, or TEST mode,
active power domains are determined by the power configuration register PCU_PCONF2 of the MC_PCU.
All power domains except power domains #0 and #1 are configurable in this mode (see the MC_PCU
chapter for details).
NOTE
As flashes can be configured in low-power or power-down state in this
mode, software must ensure that the code executes from RAM before
changing to this mode.
25.4.2.3 SAFE Mode
The device enters this mode on the following events:
• from DRUN, RUN0…3, or TEST mode when the TARGET_MODE bit field of the ME_MCTL
register is written with “0010”
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
25-35