PXD10RM Datasheet, PDF (1106/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

32.3.1.7 Functional Event Short Sequence Register (RGM_FESS)
Address 0xC3FE_4018
Access: Supervisor read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
W
POR 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 32-8. Functional Event Short Sequence Register (RGM_FESS)
This register defines which reset sequence will be done when a functional reset sequence is triggered.The
functional reset sequence can either start from PHASE1 or from PHASE3, skipping PHASE1 and
PHASE2.
NOTE
This could be useful for fast reset sequence, for example to skip flash reset.
It can be accessed in read/write in either supervisor mode or test mode. It can be accessed in read in user
mode.
Table 32-9. Functional Event Short Sequence Register (RGM_FESS) Field Descriptions
Field
Description
SS_EXR
Short Sequence for External Reset
0 The reset sequence triggered by an external reset event will start from PHASE1
1 The reset sequence triggered by an external reset event will start from PHASE3, skipping PHASE1 and
PHASE2
SS_FLASH
Short Sequence for code or data flash fatal error
0 The reset sequence triggered by a code or data flash fatal error event will start from PHASE1
1 The reset sequence triggered by a code or data flash fatal error event will start from PHASE3, skipping
PHASE1 and PHASE2
SS_LVD45
Short Sequence for 4.5V low-voltage detected
0 The reset sequence triggered by a 4.5V low-voltage detected event will start from PHASE1
1 The reset sequence triggered by a 4.5V low-voltage detected event will start from PHASE3, skipping PHASE1
and PHASE2
SS_CMU0_F Short Sequence for CMU0 clock frequency higher/lower than reference
HL
0 The reset sequence triggered by a CMU0 clock frequency higher/lower than reference event will start from
PHASE1
1 The reset sequence triggered by a CMU0 clock frequency higher/lower than reference event will start from
PHASE3, skipping PHASE1 and PHASE2
SS_CMU0_
OLR
Short Sequence for FXOSC frequency lower than reference
0 The reset sequence triggered by a FXOSC frequency lower than reference event will start from PHASE1
1 The reset sequence triggered by a FXOSC frequency lower than reference event will start from PHASE3,
skipping PHASE1 and PHASE2
32-14
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor