PXD10RM Datasheet, PDF (721/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

4
3
2
1
0
R1
0
1
0
1
W
Instruction Code
Reset 0
0
0
0
1
Figure 19-2. 5-Bit Instruction Register
19.7.2 Bypass Register
The bypass register is a single-bit shift register path selected for serial data transfer between TDI and TDO
when the BYPASS, or reserve instructions are active. After entry into the capture-DR state, the single-bit
shift register is set to a logic 0. Therefore, the first bit shifted out after selecting the bypass register is
always a logic 0.
19.7.3 Device Identification Register
The device identification register, shown in Figure 19-3, allows the part revision number, design center,
part identification number, and manufacturer identity code to be determined through the TAP. The device
identification register is selected for serial data transfer between TDI and TDO when the IDCODE
instruction is active. Entry into the capture-DR state while the device identification register is selected
loads the IDCODE into the shift register to be shifted out on TDO in the Shift-DR state. No action occurs
in the update-DR state.
IR[4:0]: 0_0001 (IDCODE)
Access: R/O
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
PRN
DC
PIN
MIC
ID
W
Reset _{0 0 0 0 1 0 1 0 1 1 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1}
Figure 19-3. Device Identification Register
Table 19-2. Device Identification Register Field Descriptions
Field
Description
0–3 Part revision number. Contains the revision number of the device. This field changes with each revision
PRN of the device or module.
4–9 Design center.
DC
10–19 Part identification number. Contains the part number of the device.
PIN
20–30 Manufacturer identity code. Contains the reduced Joint Electron Device Engineering Council (JEDEC) ID
MIC for Freescale, 0xE
31 IDCODE register ID. Identifies this register as the device identification register and not the bypass
ID register. Always set to 1.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
19-5