PXD10RM Datasheet, PDF (842/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Field
LASE
18
AWUM
19
MBL[0:3]
20:23
BF
24
SFTM
25
LBKM
26
MME
27
SBDT
28
RBLM
29
Table 23-3. LINCR1 field descriptions (continued)
Description
LIN Slave Automatic Resynchronization Enable
0 Automatic resynchronization disable.
1 Automatic resynchronization enable.
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
Automatic Wake-Up Mode
This bit controls the behavior of the LINFlex hardware during Sleep mode.
0 The Sleep mode is exited on software request by clearing the SLEEP bit of the LINCR.
1 The Sleep mode is exited automatically by hardware on LINRX dominant state detection. The
SLEEP bit of the LINCR is cleared by hardware whenever WUF bit in the LINSR is set.
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
LIN Master Break Length
These bits indicate the Break length in Master mode (see Table 23-5).
Note: These bits can be written in Initialization mode only. They are read-only in Normal or Sleep
mode.
Bypass filter
0 No interrupt if identifier does not match any filter.
1 An RX interrupt is generated on identifier not matching any filter.
Note:
• If no filter is activated, this bit is reserved.
• This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
Self Test Mode
This bit controls the Self Test mode. For more details, see Section 23.6.2, Self Test mode.
0 Self Test mode disable.
1 Self Test mode enable.
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
Loop Back Mode
This bit controls the Loop Back mode. For more details see Section 23.6.1, Loop Back mode.
0 Loop Back mode disable.
1 Loop Back mode enable.
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode
Master Mode Enable
0 Slave mode enable.
1 Master mode enable.
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
Slave Mode Break Detection Threshold
0 11-bit break.
1 10-bit break.
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
Receive Buffer Locked Mode
0 Receive Buffer not locked on overrun. Once the Slave Receive Buffer is full the next incoming
message overwrites the previous one.
1 Receive Buffer locked against overrun. Once the Receive Buffer is full the next incoming
message is discarded.
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
23-10
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor