PXD10RM Datasheet, PDF (711/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

NOTE
It is the user’s responsibility to ensure the bit time settings are in compliance
with the CAN standard. For bit time calculations, use an IPT (Information
Processing Time) of 2, which is the value implemented in the FlexCAN
module.
18.4.8.5 Arbitration and Matching Timing
During normal transmission or reception of frames, the arbitration, matching, move-in and move-out
processes are executed during certain time windows inside the CAN frame, as shown in Figure 18-18.
CRC (15)
Matching/Arbitration Window (24 bits)
Start Move
(bit 6)
EOF (7)
Interm
Move
Window
Figure 18-18. Arbitration, Match and Move Time Windows
When doing matching and arbitration, FlexCAN needs to scan the whole Message Buffer memory during
the available time slot. In order to have sufficient time to do that, the following requirements must be
observed:
• A valid CAN bit timing must be programmed, as indicated in Table 18-20
• The peripheral clock frequency can not be smaller than the oscillator clock frequency, i.e. the PLL
can not be programmed to divide down the oscillator clock
• There must be a minimum ratio between the peripheral clock frequency and the CAN bit rate, as
specified in Table 18-21
Table 18-21. Minimum Ratio Between Peripheral Clock Frequency and CAN Bit Rate
Number of Message
Buffers
16
32
64
Minimum Ratio
8
8
16
A direct consequence of the first requirement is that the minimum number of time quanta per CAN bit must
be 8, so the oscillator clock frequency should be at least 8 times the CAN bit rate. The minimum frequency
ratio specified in Table 18-21 can be achieved by choosing a high enough peripheral clock frequency when
compared to the oscillator clock frequency, or by adjusting one or more of the bit timing parameters
(PRESDIV, PROPSEG, PSEG1, PSEG2). As an example, taking the case of 64 MBs, if the oscillator and
peripheral clock frequencies are equal and the CAN bit timing is programmed to have 8 time quanta per
bit, then the prescaler factor (PRESDIV + 1) should be at least 2. For prescaler factor equal to one and
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
18-41