PXD10RM Datasheet, PDF (1049/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

PBR
0b00
0b00
Table 30-38. Baud Rate Computation Example
Prescaler
2
2
BR
0b0000
0b0000
Scaler
2
2
DBR
0
1
Fsys
100 MHz
20 MHz
Baud Rate
25 Mb/s
10 Mb/s
30.5.2.7.2 PCS to SCK Delay (t_CSC)
The PCS to SCK delay is the length of time from assertion of the PCS signal to the first SCK edge. See
Figure 30-27 and Figure 30-28 for an illustration of the PCS to SCK delay. The PCSSCK and CSSCK
fields in the QSPI_CTARX registers select the PCS to SCK delay by the formula in the CSSCK[0:3] bit
description. Table 30-39 shows an example of how to compute the PCS to SCK delay.
Table 30-39. PCS to SCK Delay Computation Example
PCSSCK
0b01
Prescaler
3
CSSCK
0b0100
Scaler
32
Fsys
100 MHz
PCS to SCK Delay
0.96 s
30.5.2.7.3 After SCK Delay (t_ASC)
The After SCK Delay is the length of time between the last edge of SCK and the negation of PCS. See
Figure 30-36 for illustrations of the After SCK delay. The PASC and ASC fields in the QSPI_CTARX
registers select the After SCK Delay by the formula in the ASC[0:3] field description. Table 30-40 shows
an example of how to compute the After SCK delay.
Table 30-40. After SCK Delay Computation Example
PASC
0b01
Prescaler
3
ASC
0b0100
Scaler
32
Fsys
100 MHz
After SCK Delay
0.96 s
30.5.2.7.4 Delay after Transfer (t_DT)
The Delay after Transfer is the length of time between negation of the PCS signal for a frame and the
assertion of the PCS signal for the next frame. See Figure 30-27 for an illustration of the Delay after
Transfer. The PDT and DT fields in the QSPI_CTARx registers select the Delay after Transfer by the
formula in the DT[0:3] field description. Table 30-41 shows an example of how to compute the Delay after
Transfer.
Table 30-41. Delay after Transfer Computation Example
PDT
Prescaler
DT
Scaler
Fsys
Delay after Transfer
0b01
3
0b1110
32768 100 MHz
0.98 ms
When in non-continuous clock mode the T_DT delay can be configured as outlined in the QSPI_CTARx
registers. When in continuous clock mode the delay is fixed at 1 SCK period.
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
30-45