PXD10RM Datasheet, PDF (961/1332 Pages) Freescale Semiconductor, Inc – PXD10 Microcontroller

Chapter 26
Nexus Development Interface (NDI)
26.1 Introduction
The Nexus Development Interface (NDI) block provides real-time development support capabilities for
the PXD10 MCU in compliance with the IEEE-ISTO 5001-2003 standard. This development support is
supplied for MCUs without requiring external address and data pins for internal visibility.
The NDI block is an integration of several individual Nexus blocks that are selected to provide the
development support interface for PXD10.
The NDI block interfaces to the e200z0, and internal buses to provide development support as per the
IEEE-ISTO 5001-2003 standard. The development support provided includes program trace, watchpoint
messaging, ownership trace, watchpoint triggering, processor overrun control, run-time access to the
MCU’s internal memory map, and access to the e200z0 internal registers during halt, via the JTAG port.
26.2 Block Diagram
Figure 26-1 shows a functional block diagram of the NDI.
A simplified block diagram of the NDI illustrates the functionality and interdependence of major blocks
(see Figure 26-2) and how the individual Nexus blocks are combined to form the NDI.
Divided system
clock
e200z1
trace
information
e200z0
trace
information
Program trace
CPU
Message Message
snoop ^{Ownership trace} queue formatter
Watchpoint trace
Arbiter
MCKO
MDO
MSEO
EVTO
Control registers
to trace blocks
Input
TAP
controller
TCK
TMS
TDI
TDO
Power-on
reset
Reset
control
EVTI
Figure 26-1. NDI Functional Block Diagram
Freescale Semiconductor
PXD10 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
26-1