SH7720 Datasheet, PDF (97/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 1 Overview
Classification Symbol
I/O
Name
Function
Advanced user AUDATA3 to O
debugger
AUDATA0
(AUD)
AUDCK
O
AUDSYNC
O
AUD data
AUD clock
AUD
synchronous
signal
Destination-address output pin in
branch-trace mode
Synchronous clock output pin in
branch-trace mode
Data start-position acknowledge-
signal output pin in branch-trace
mode
E10A interface ASEBRKAK O
ASEMD0
I
ASE break
mode
acknowledge
ASE mode
Indicates that the E10A emulator
has entered its break mode.
Sets ASE mode.
Notes: 1. All Vcc/Vss/VccQ/VssQ/VccQ1/VssQ1/AVcc/AVss/AVcc_USB/AVss_USB/VccQ_RTC/
Vcc_RTC/Vss_RTC/Vcc_PLL1/Vss_PLL1/Vcc_PLL2/Vss_PLL2 should be connected to
the system power supply (so that power is supplied at all times.) In hardware standby
mode, the power supply to other than Vcc_RTC and VccQ_RTC can be turned off
(section 13.8).
2. Always supply power to the Vcc_RTC and VccQ_RTC, even if the RTC is not being
used.
3. Always supply power to the Vcc_PLL1 and Vcc_PLL2, even if the PLL is not being
used.
4. Drive ASEMD0 high when using the user system alone, and not using an emulator or
the H-UDI. When this pin is low or open, RESETP may be masked.
5. Drivability can be switched by the register settings of the pin function controller (PFC).
When 3.3 V is applied to VccQ1, set the drivability low. When 1.8 V is applied to
VccQ1, set the drivability high.
6. SDHI associated pins support only for the models including the SDHI.
Rev. 3.00 Jan. 18, 2008 Page 35 of 1458
REJ09B0033-0300