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SH7720 Datasheet, PDF (648/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Section 18 Serial Communication Interface with FIFO (SCIF)
• Asynchronous mode:
Serial data communications are performed by start-stop in character units. The SCI can
communicate with a universal asynchronous receiver/transmitter (UART), an asynchronous
communication interface adapter (ACIA), or any other communications chip that employs a
standard asynchronous serial system. There are eight selectable serial data communication
formats.
 Data length: Seven or eight bits
 Stop bit length: One or two bits
 Parity: Even, odd, or none
 LSB first
 Receive error detection: Parity, framing, and overrun errors
 Break detection: Break is detected when the receive data next the generated framing error
is the space 0 level and has the framing error.
• Synchronous mode:
Serial data communication is synchronized with a clock. Serial data communication can be
carried out with other chips that have a synchronous communication function.
 Data length: 8 bits
 LSB-first transfer
Rev. 3.00 Jan. 18, 2008 Page 586 of 1458
REJ09B0033-0300