SH7720 Datasheet, PDF (525/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Initial
Bit Bit Name Value R/W
2
PFC2
0
R/W
1
PFC1
1
R/W
0
PFC0
1
R/W
Section 11 Clock Pulse Generator (CPG)
Description
Peripheral Clock Frequency Division Ratio
These bits specify the division ratio of the peripheral
clock (Pφ) frequency with respect to the output frequency
of PLL circuit 1.
000: × 1 time
001: × 1/2 time
010: × 1/3 time
011: × 1/4 time
100: × 1/6 time
Other than above: Reserved (setting prohibited)
Rev. 3.00 Jan. 18, 2008 Page 463 of 1458
REJ09B0033-0300