SH7720 Datasheet, PDF (1152/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 31 MultiMediaCard Interface (MMCIF)
Command sequence start
FIFO clear
Write transfer block size to TBCR
Execute CMD16
Does CMD16 end
No
successfully?
Yes
Set DMAC
Set DMACR (MMCIF)
Execute CMD17 (CMDR to CMDSTRT)
Yes
Is CRCERI interrupt
generated?
No
No
Is CRPI interrupt
generated?
Yes
Read response register
Is response status
No
normal?
Yes
No
Is CTERI interrupt
generated?
Yes
Is CRCERI interrupt
Yes
generated?
No
Is DTERI interrupt
Yes
generated?
No
No
Is DTI interrupt
generated?
Yes
Write 1 to CMDOFF Write 1 to CMDOFF
Set DMACR to H'84
Set DMACR to H'00 Set DMACR to H'00
No
Does DMA transfer
end?
Yes
Set DMACR to H'00
FIFO clear
Command sequence end
Figure 31.23 Operational Flowchart for Read Sequence (Single Block Transfer)
Rev. 3.00 Jan. 18, 2008 Page 1090 of 1458
REJ09B0033-0300