SH7720 Datasheet, PDF (1088/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 30 SIM Card Module (SIM)
(6) Transmit End Interrupt
In continuous transmission, when the TEIE bit is always set to 1, the TEND bit is set to 1 at a
transmit end. Therefore, the unnecessary transmit end interrupt (TEI) request occurs.
When SCTSR starts transmitting after the last transmit data is written to SCTDR, the TEIE bit in
SCSCR should be set to 1 so that the occurrence of the unnecessary TEI interrupt request can be
prevented.
The waveform of the timing to set the TEIE bit to 1 is shown in figure 30.12.
Transmit frame
Transmit frame
Last frame
(DE)
(DE)
(DE)
Ds D0 D1 D2 D3 D4 D5 D6 D7 DP
Ds D0 D1 D2 D3 D4 D5 D6 D7 DP
Ds D0 D1 D2 D3 D4 D5 D6 D7 DP
TDRE
TEND
TEIE
TEI request
Unnecessary TEND set timing
TEIE set timing
Figure 30.12 TEIE Set Timing
Rev. 3.00 Jan. 18, 2008 Page 1026 of 1458
REJ09B0033-0300