SH7720 Datasheet, PDF (1169/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 31 MultiMediaCard Interface (MMCIF)
[1]
[2]
No
Does DMA transfer
end?
Yes
Set DMACR to H'00
Yes
Is CRCERI or WRERI
interrupt generated?
No
Yes
Is DTERI interrupt
generated?
No
No
Is BTI interrupt
generated?
Yes
No
Is DTBUSY
detected?
Yes
No
Is DBSYI interrupt
generated?
Yes
Write 1 to CMDOFF
Write 1 to CMDOFF
Execute CMD12
Set DMACR to H'00
FIFO clear
Write 1 to CMDOFF
Command sequence end
Figure 31.32 Operational Flowchart for Pre-defied Multiblock Write Transfer
in Auto Mode (2)
Rev. 3.00 Jan. 18, 2008 Page 1107 of 1458
REJ09B0033-0300