SH7720 Datasheet, PDF (1124/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 31 MultiMediaCard Interface (MMCIF)
(4) Operation of Commands without Data Transfer
The broadcast, relative address, and flash memory operation commands include a number of
commands that do not include data transfer. Such commands execute the desired data transfer
using command arguments and command responses. For a command that is related to time-
consuming processing such as flash memory write/erase, the MMC indicates the data busy state
via the MMC_DAT.
Figures 31.4 and 31.5 show examples of the command sequence for commands without data
transfer.
Figure 31.6 shows the operational flow for commands without data transfer.
• Settings needed to issue a command are made.
• The START bit in CMDSTRT is set to start command transmission.
• Command transmission complete can be confirmed by the command output end interrupt
(CMDI).
• A command response is received from the MMC.
• If the MMC does not return the command response, the command response is detected by the
command timeout error (CTERI).
• The end of a command sequence is detected by poling the BUSY flag in CSTR or by the
command response end interrupt (CRPI).
• Whether the data busy state is entered or not is determined by the DTBUSY bit in CSTR. If the
data busy state is entered, the end of the data busy state is detected by the data busy end
interrupt (DBSYI).
• When the CRC error (CRCERI) or command timeout error (CTERI) occurs, write 1 to the
CMDOFF bit.
Rev. 3.00 Jan. 18, 2008 Page 1062 of 1458
REJ09B0033-0300