SH7720 Datasheet, PDF (1253/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 35 I/O Ports
35.6.2 Port F Data Register (PFDR)
PFDR is a register that stores data for pins PTF6 to PTF0. Bits PF6DT to PF0DT correspond to
pins PTF6 to PTF0. When the function is general input port, if the port is read, the corresponding
pin level is read.
Initial
Bit Bit Name Value R/W Description
7

0
R
Reserved
This bit is always read as 0. The write value should always
be 0.
6
PF6DT 0
R
Table 35.6 shows the function of PFDR.
5
PF5DT 0
R
4
PF4DT 0
R
3
PF3DT 0
R
2
PF2DT 0
R
1
PF1DT 0
R
0
PF0DT 0
R
Table 35.6 Port F Data Register (PFDR) Read/Write Operations
PFCR State
PFnMD1 PFnMD0 Pin State
Read
0
0
Other function PFDR value
1
Reserved

1

Input (Pull-up Pin state
MOS off)
Write
Value is written to PFDR, but does not affect
pin state.

Value is written to PFDR, but does not affect
pin state.
Note: n = 1 to 6
Rev. 3.00 Jan. 18, 2008 Page 1191 of 1458
REJ09B0033-0300