SH7720 Datasheet, PDF (561/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 14 Timer Unit (TMU)
Section 14 Timer Unit (TMU)
This LSI includes a three-channel 32-bit timer unit (TMU).
14.1 Features
• Each channel is provided with an auto-reload 32-bit down counter
• All channels are provided with 32-bit constant registers and 32-bit down counters that can be
read or written to at any time
• All channels generate interrupt requests when the 32-bit down counter underflows
(H'00000000 → H'FFFFFFFF)
• Allows selection among five counter input clocks: Pφ/4, Pφ/16, Pφ/64, Pφ/256, and RTC
output clock (16 kHz)
• Allows channels operate when this LSI is in standby mode
Even when this LSI is in standby mode, channels can operate when the RTC output clock is
used as a counter input clock.
TIMTMU0A_000020011000
Rev. 3.00 Jan. 18, 2008 Page 499 of 1458
REJ09B0033-0300