SH7720 Datasheet, PDF (1146/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 31 MultiMediaCard Interface (MMCIF)
[1]
[2]
Write data to FIFO*1
Write 1 to DATAEN
No
Is FEI interrupt
generated?
Yes
No
Cap × n(FEI) -
Len (1 + n(DRPI)) ≥ Len*2
Yes
No
Is DTI interrupt
generated?
Yes
Is CRCERI interrupt
Yes
generated?
No
Is DTERI interrupt
Yes
generated?
No
No
Is DRPI interrupt
generated?
Yes
Is DTBUSY
No
detected?
Yes
No
Is DBSYI interrupt
generated?
Yes
Is next block
written?
Yes
Notes: 1.
Write data of block length
when block length ≤ FIFO size,
data of FIFO size
when block length > FIFO size.
2. Len:
Cap:
n(FEI):
Block length (byte)
FIFO size (byte)
The number of FEIs from
the start of write sequence
n(DRPI): The number of DRPIs from
the start of write sequence
No
Write 1 to CMDOFF
Execute CMD12
Command sequence end
Write 1 to CMDOFF
Figure 31.20 Operational Flowchart for Commands with Write Data
(Open-ended Multiblock Transfer) (2)
Rev. 3.00 Jan. 18, 2008 Page 1084 of 1458
REJ09B0033-0300