SH7720 Datasheet, PDF(1464/1524 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

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SH7720 Datasheet, PDF (1464/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

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Item

Page Revision (See Manual for Details)

8.4.4 PINT Interrupts

268 Added

While an RTC clock is supplied, recovery from a

standby state on a PINT interrupt is possible if the

interrupt level is higher than that set in the I3 to I0 bits

of the SR register.

8.4.6 Interrupt Exception Handling 270

and Priority

Table 8.3 Interrupt Exception

Handling Sources and Priority

(IRQ Mode)

Ammended

Interrupt

Priority

Interru (Initial

Interrupt Source pt Code Value)

USB USBHI H'A60*3 0 to 15 (0)

H

DMA DEI4

H'B80*3 0 to 15 (0)

C (2)

DEI5

H'BA0*3

IPR

(Bit

Numbers)

Priority

within IPR

Setting

Unit

Default

Priority

IPRJ (11 to ï£§

8)

IPRF (11 to High

8)

Low

TMU TMU_SUNI H'6C0 0 to 15 (0) IPRD

ï£§

(11 to 8)

ï£§ï£§

ï£§

ï£§

ï£§

ï£§

Rev. 3.00 Jan. 18, 2008 Page 1402 of 1458

REJ09B0033-0300

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